Fabrication Technologies for Three-Dimensional Integrated Circuits (invited)
نویسندگان
چکیده
The MIT approach to 3-D VLSI integration is based on low-temperature Cu-Cu wafer bonding. Device wafers are bonded in a face-to-back manner, with short vertical vias and Cu-Cu pads as the inter-wafer throughway. In our scheme, there are several reliability criteria, which include: a) Structural integrity of the Cu-Cu bond, b) CuCu contact electrical characteristics, and c) Process flow efficiency and repeatability. In addition, CAD tools are needed to aid in design and layout of 3DICs. This paper will discuss recent results in all these areas.
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